On October 29, XHEART (Xinhangtu, Suzhou) officially launched its intelligent-driving large-model chip, the X7 Ultra, in Suzhou. Built around the philosophy of ‘large models define the chip,’ it delivers 700 TOPS of large-model compute and supports in-vehicle models with a 10x increase in parameter count. CEO Li Zonglin argued at the launch that as smart driving moves from multiple small models toward end-to-end large models, the old routine of building the chip first and letting algorithms adapt to the hardware can no longer keep up — the X7 Ultra reverses the flow, defining its architecture from the real requirements of production models. The company also disclosed that the X7 series has shipped more than 200,000 units within eight months of mass production, is installed in 10 production vehicle models, and has won orders covering over 40 models; the next-generation large-model chip X9 is planned for 2027.
On specifications, the X7 Ultra brings six key advantages: an oversized NPU core purpose-built for large models, unlocked hardware parallelism, a re-architected AI toolchain, China’s first mass-produced Armv9 automotive-grade CPU, deep heterogeneous computing, and software-hardware co-optimization. Measured on production smart-driving models, its NPU compute utilization reaches 98.7%, memory bandwidth consumption drops by 80%, and energy efficiency improves by 100%. On the qualification side, the X7 chip passed SGS AEC-Q100 automotive reliability verification in February 2026 and earned China’s first SEMI TRUST MARK credential, followed by SGS ISO 26262 functional-safety ASIL-B and ASIL-D product certification in March. The company was spun out of Momenta’s chip team through independent financing.
From an industry perspective, the X7 Ultra launch marks the smart-driving chip race entering a new ‘large models define hardware’ phase: as end-to-end model parameters grow by nearly an order of magnitude with each generation, the marginal return of simply stacking generic compute is shrinking — 98.7% NPU utilization and an 80% reduction in memory bandwidth consumption show that compute efficiency, not peak TOPS, is becoming the new competitive focus. China’s first mass-produced Armv9 automotive-grade CPU also means domestic smart-driving silicon has, for the first time, started from the same CPU IP generation as its foreign peers. The iteration cadence of smart-driving chips is shifting from following smartphone SoCs to following large-model generations — a change that will reshape design methodology and the division of labor across the automotive silicon supply chain.
For Junyi Microelectronics, the architectural evolution of automotive large-model chips resonates directly with the company’s edge-computing track: the extreme pursuit of NPU utilization and memory bandwidth in vehicles shares the same compute-efficiency logic that Junyi pursues at the industrial edge with its 5G-EDGE-3399Pro and AI-BOX-3588 edge-computing hosts. The X7 series’ ramp to 200,000 units in eight months also confirms the transmission chain in which high-compute SoCs drive volume for downstream boards and complete systems — a chain carried naturally by Junyi’s J-3568/J-3576/J-3588 core boards and K-series edge-AI motherboards. The company also keeps tracking reliability methods shared between automotive and industrial scenarios, folding AEC-Q100 and ISO 26262 discipline into the quality-control system of its IPC-i5-1235U industrial mini-PCs and touch-panel all-in-one machines, so that industrial-grade products share automotive-grade design rigor.
Source: http://finance.sina.com.cn/tech/digi/2026-10-29/doc-iniwwtuv8829498.shtml (2026-10-29)