On October 27, Taiwan’s Commercial Times, citing supply-chain sources, reported that TSMC is considering raising prices for its advanced packaging processes by 10% to 20%, with CoWoS (Chip on Wafer on Substrate) technology as the core target. Capacity pressure from relentlessly strong AI chip demand is now transmitting to the cost side of the supply chain.
The report noted that spillover demand for CoWoS and persistently tight capacity are the core reasons behind the proposed increase. If the price adjustment lands, it would directly raise production costs for chip giants such as NVIDIA and AMD, and could further pass through to the prices of end products like Apple’s iPhone and MacBook — which are already under pressure from rising memory chip prices.
Viewed from the industry landscape, advanced packaging has been promoted from a “back-end process” to a critical bottleneck in the AI compute race. In the era of giant chips, 2.5D packaging such as CoWoS assembles the GPU and HBM high-bandwidth memory into a single system-level chip, and its capacity directly caps the shipment ceiling of AI accelerator cards. The packaging capacity arms race also reflects the depth of AI infrastructure investment: as foundry, packaging and memory all tighten at once, the scarcity of compute hardware will transmit from the cloud all the way to the edge.
For board and system vendors like Junyi Microelectronics, price fluctuations in upstream packaging and advanced process nodes bear directly on the cost and lead-time management of core components. In component selection and stocking strategy for products such as the AI-BOX-3588 and 5G-EDGE-3399Pro edge computing hosts, Junyi consistently insists on platform diversification and long-horizon supply evaluation to buffer upstream volatility; at the same time, the mature ecosystem of the J-3568/J-3576/J-3588 core boards helps customers find the optimum between compute and cost.
Source: https://k.sina.com.cn/article_5953740931_162dee083067043fg6.html (2026-10-27)